The present invention relates to a method for processing detected defect data obtained by inspecting semiconductor substrates processed until a predetermined fabrication sub-process, with an inspection equipment or a review station, for defects or suspected defects occurred to the semiconductor substrates, in a fabrication line consisting of a plurality of fabrication sub-processes arranged in sequence, each sub-process being performed by one or a plurality of manufacturing equipments. In particular, the invention relates to a method for manufacturing semiconductor devices, while controlling fault occurrence in the sub-processes in the fabrication line.
As is shown in FIG. 1, a semiconductor device manufacturing process consists of a great number of pattern-forming processes that are iteration. Each pattern-forming process (major process) is comprised of the processes (sub-processes) of thin-film deposition, resist application, expose resist, develop resist, etching, remove resist, and cleaning. Unless the manufacturing conditions are optimized in all the above processes, circuit patterns of a semiconductor device are not formed properly and cracks or deformation may take place in the patterns, which results in wafers that are not acceptable as products.
After being fabricated on a wafer, semiconductor devices are electrically inspected. If defects are detected, examination is made to ascertain what caused them by an appropriate method such as a failure bitmap analysis and remedy action is taken. For example, a known method is described in JP-A No. 354396/1999 that statistically analyzes the relation between the electrical characteristics of the completed device and processing equipments, and determines what equipment caused the defect.
However, the problem with this method is that, even if defects have occurred in the course of the fabrication process, the defects cannot be detected until the fabrication of the wafer is completed. Thus, it may happen that a great quantity of defective products are made before appropriate action against the defects is taken.
To address this problem, the following method has widely been used. As shown in FIG. 1, semiconductor wafers in process of fabrication are inspected for critical dimensions, patterns, and particles on the surface of a wafer, the cause of defects that may occur due to failure or malfunction of an equipment is investigated, and remedy action is taken against it. However, the addition of such inspection processes becomes obstructive to shortening the manufacturing time and therefore it is impossible to inspect all products in all processes. Accordingly, in the practical fabrication line of semiconductor devices, such a method is taken that inspection applies only to critical processes or that wafers to be inspected are sampled at a rate, for example, one for several lots.
Because all manufacturing processes shown in FIG. 1 are possible to be the source of defects, an important technical issue has focused on how to determine a particular process and equipment that caused defects, using the result data from inspection for a small number of wafers.
JP-A No. 455919/1999 discloses a known method of inferring a process that caused defects from defects distribution data obtained by the inspection of wafers in process of fabrication. The problem with this method is that it is difficult to determine a particular process and equipment as the source of defects in the critical processes for which the inspection was not performed.
It is also known that defects having the same causal relationship are similar in their spatial properties and, from this fact, spatial clustering of defects is performed correctly, according to the specification and its accompanying drawings of U.S. Pat. No. 5,991,699.
From the analysis of inspection result data, using the above prior techniques, a sub-process or manufacturing equipment that caused defects can be inferred to some degree. However, it is very difficult to pinpoint a particular sub-process as the source of the defects because semiconductor devices are manufactured through quite a great number of manufacturing processes and there are many sub-processes between a process under inspection and the next process under inspection.
If a plurality of defects resulting from different causes occur, coexisting on a wafer, these defects are interactive and make analysis complex and it often takes considerable time to investigate the cause of the defects.
The previous data analysis methods are all unable to predict where defects would be likely to occur.